20 publicaciones de empleo destacadas de data engineer en paterna, vc (¡Están contratando!)

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Analog Devices —Valencia, Valencia provincia
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Senior Engineer, Digital Design Engineering

Analog Devices -
Valencia, Valencia provincia

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Detalles del empleo

Jornada completa

Cualificaciones

Arquitectura del sistema
Máster
Grado
ARM

Descripción completa del empleo

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X .

Senior Digital Design Engineer

Responsibilities

This position will involve many of the following tasks.

FPGA prototyping of design

Development of models & self checking mechanisms for FPGA

HW & S/W Codesign

Architectural design and specification of blocks.

Verilog/ SystemVerilog RTL design

Interaction with customer and stakeholders

Design to meet timing, area, low-power, DFT, manufacturing test and timing targets for market

All aspects of design work including interaction with verification and analog team.

Interaction with implementation team to convert RTL to silicon. Defining timing constraints and performing static timing analysis

Working with architecture and design teams to determine functionality protocols

Qualifications

Bachelor's or Master's degree, in Engineering (Electronic Engineering) or equivalent

Architectural design and specification of complex systems, especially in system on chip with processors.

Deep knowledge of FPGA development flow

FPGA modelling

Verilog/ SystemVerilog RTL design - with emphasis on AHB, AXI protocols and processor architecture on ARM cores.

Design to meet timing, area, low-power, manufacturing test and timing targets for market.

All aspects of design work including interaction with verification and analog team.

Interaction with implementation team to convert RTL to silicon.

Working with architecture and design teams to determine functionality protocols

Ability to work well in a diverse team environment

Strong interpersonal, teamwork and communication skills are required .

Precise documentation and attention to detail are essential.

Quick to adopt new technologies

Ability to work well in a diverse team environment

Strong interpersonal, teamwork and communication skills are required .

Be self-motivated and enthusiastic.

Good problem solving skills.

Architected design and specification of blocks and platforms.

Act as design hub to interact with stakeholders – test, application, physical implementation, verification

Design to meet area, low-power, manufacturing test and timing targets.

Intellectual Property (IP) block design and integration.

Perform timing, power and CDC analysis on design

Verification of blocks using UVM.

Mixed-signal integration and verification / co-simulation

Working with product development teams to align digital system architecture and methodologies with product roadmap

#LI-RW1

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days

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Quiero recibir la alerta de empleo más reciente de data engineer en paterna, vc

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