8 publicaciones de empleo destacadas de node en madrid, md (¡Están contratando!)

DFT & Post-Silicon Validation
TechBiz Global GmbH —Madrid, Madrid provincia
- Jornada completa
- Trabajo híbrido
- Doctorado
- Informática
- Máster
Solicitud rápida
Grid Congestion & Regulatory Engineer, EMEA
Lightsource BP —Madrid, Madrid provincia
- Doctorado
- Inglés
- Máster
- Plan de pensiones
AI Engineer
Sabio Group —Madrid, Madrid provincia
- Jornada completa
- Trabajo híbrido
- Español
- Azure
- Inglés
- Seguro de vida
- Plan de pensiones
Solicitud rápida
Consultor/a senior IA Generativa
Repsol —Arganzuela-Madrid, Madrid provincia
- Jornada completa
- Trabajo híbrido
- Azure
- Informática
- Inglés
- Seguro médico privado
- Plan de pensiones
5d
Senior Fullstack Engineer AI / LLM
knowmad mood —Madrid, Madrid provincia
- De lunes a viernes
- Teletrabajo
- Azure
- Inglés
- Java
10d
Senior Python Engineer - IA / LLMs
Infortec Consultores —Madrid, Madrid provincia
- Jornada completa
- Azure
- Java
- Máster
Solicitud rápida
4d
Senior Backend Engineer (.NET & Cloud)
Business Insights —Madrid, Madrid provincia
- Jornada completa
- Trabajo híbrido
- Azure
- Informática
- DevOps
Solicitud rápida
Arquitecto/a Desarrollador/a Cloud & IA
MAPFRE —Madrid, Madrid provincia
- Azure
- Informática
- DevOps
- Seguro médico privado
- Flexibilidad horaria

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DFT & Post-Silicon Validation

TechBiz Global GmbH
Madrid, Madrid provincia

Solicitud rápida

Detalles del empleo

Jornada completa

Cualificaciones

Doctorado
Informática
Máster
SoC
Grado
Scripting

Descripción completa del empleo

At TechBiz Global, we are providing recruitment service to our TOP clients from our portfolio. We are currently looking for a

DFT & Post-Silicon Validation to join one of our clients' team

Are you passionate about Design for Testability (DFT) for complex SoCs and SoC chiplets in package? We need you! As a Senior DFT and Post-Silicon Lead, you will own the DFT implementation process, ensuring seamless integration with test and post-silicon validation teams. You will work with cutting-edge technology, collaborating closely with external IP providers, EDA vendors, and internal teams to deliver high-quality, high-performance SoCs or SiPs for mass production.

Key Responsibilities

Leadership & Team Management
Lead and mentor the DFT and Post-Silicon engineering teams to drive innovation and efficiency.
Provide technical direction, ensuring alignment with organizational goals.
Foster a culture of continuous improvement and collaboration.
DFT Strategy & Execution
Define and implement DFT architectures to improve testability, debug capabilities, and manufacturability.
Ensure proper insertion of DFT features such as scan chains, BIST (Built-In Self-Test), and JTAG interfaces.
Optimize DFT methodologies to minimize test time, reduce cost, and improve quality/yield.
Test Development & Implementation
Develop and implement test plans and test strategies at silicon, package, and system levels.
Define and develop automated test solutions for production and characterization.
Ensure test coverage for all product development stages, from pre-silicon to mass production.
Guarantee high yield on the final solution while considering chiplet complexities.
Cross-Functional Collaboration
Work closely with design, validation, packaging, and operations teams to ensure seamless integration of testing and manufacturability.
Collaborate with product management to ensure alignment with customer requirements and timelines.
Process Improvement & Innovation
Continuously explore and implement new DFT methodologies and manufacturing processes.
Lead initiatives for cost reduction, efficiency improvements, and quality enhancements in test and production.

Reporting Structure

Reports to: Physical Implementation Team Manager

Receives reports from: DFT and Post-Silicon team members

Bachelor’s, Master’s, or PhD in Computer Science, Electrical Engineering, or a related field.
Proven experience with multiple tape-outs of high-performance SoCs or SiPs for mass production.
Strong background in post-silicon test optimization and yield analysis.
Experience in defining and implementing test strategies for high-volume production.
Proficiency in RTL and testbench development using SystemVerilog and Verilog.
Strong scripting skills (Shell, Tcl, Python3).
Hands-on experience with Tessent and SSN methods integrated with leading EDA design flows for advanced technology nodes is a plus.

Solicitud rápida

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node empleos en madrid, md

DFT & Post-Silicon Validation

Grid Congestion & Regulatory Engineer, EMEA

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