20 publicaciones de empleo destacadas de design verification engineer en comunidad de madrid (¡Están contratando!)

ASIC Design Engineer
GMV —Tres Cantos, Madrid provincia
- Trabajo híbrido
- Informática
- Seguro dental
Electronics design engineer (Space systems)
GMV —Tres Cantos, Madrid provincia
- Trabajo híbrido
- Seguro dental
Senior Hardware Design Engineer (SOC - FPGA and Firmware)
GMV —Tres Cantos, Madrid provincia
- Trabajo híbrido
- C++
- Python
- Seguro dental
Senior ATC ERTMS On Board Design Engineer
ALSTOM —Madrid, Madrid provincia
- Inglés
- Grado
Electrical & Lighting System Design Office Engineer (+Simulation Skills)
Airbus Defence and Space SAU —Getafe, Madrid provincia
- Jornada completa
- Español
- Inglés
- Máster
Communication System Designer Engineer for COMBAT A/C
Airbus Defence and Space SAU —Getafe, Madrid provincia
- Jornada completa
- Trabajo híbrido
- Inglés
- Máster
3d
Systems engineer (Defence sector)
GMV —Tres Cantos, Madrid provincia
- Trabajo híbrido
- Inglés
- Seguro dental
IT Infrastructure Engineer
GMV —Tres Cantos, Madrid provincia
- Trabajo híbrido
- Microsoft Word
- Microsoft Excel
- Seguro dental
RF & Signal Processing Engineer (Space systems)
GMV —Tres Cantos, Madrid provincia
- Trabajo híbrido
- C++
- Seguro dental
Design & Development Lab Test Means
Airbus Defence and Space SAU —Getafe, Madrid provincia
- Jornada completa
- Inglés
CBTC Software Verification Engineer
ALSTOM —Madrid, Madrid provincia
- Jornada completa
- Sistema operativo Windows
- C++
- Desarrollo de software
Digital Signal Processing & FPGA Engineer Radar
Minsait —Madrid, Madrid provincia
- Scripting
- Python
- Formación continua
- Oportunidades de crecimiento y desarrollo profesional
PCB Engineer for electronics equipment
GMV —Tres Cantos, Madrid provincia
- Trabajo híbrido
- Oficina
- Manufactura
- Seguro dental
RMT Engineer for A400M Program
Airbus Defence and Space SAU —Getafe, Madrid provincia
- Jornada completa
- Trabajo híbrido
- Oficina
8d
Mission Systems Engineer
Airbus Defence and Space SAU —Getafe, Madrid provincia
- Jornada completa
- Trabajo híbrido
- Español
- Inglés
- Máster
- Seguro de vida
Digital Signal Processing & FPGA Engineer Radar
Indra —Madrid, Madrid provincia
- Scripting
- Python
- Formación continua
- Oportunidades de crecimiento y desarrollo profesional
Internship - Mechanical/Structural Engineer
Orbital Paradigm —Madrid, Madrid provincia
- Jornada completa
- Trabajo híbrido
- Inglés
- Manufactura
Solicitud rápida
8d
Senior Mixed-signal IC Design Engineer
Knowledge Development for Plastic Optical Fiber —Madrid, Madrid provincia
- Teletrabajo
- Doctorado
- Inglés
- Máster
Flight on-board SW engineer
GMV —Tres Cantos, Madrid provincia
- Trabajo híbrido
- Informática
- C++
- Desarrollo de software
- Seguro dental
Systems Verification and Validation Engineer (Cybersecurity)
GMV —Tres Cantos, Madrid provincia
- Scripting
- Seguro dental

Quiero recibir la alerta de empleo más reciente de design verification engineer en comunidad de madrid

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ASIC Design Engineer

GMV -
Tres Cantos, Madrid provincia

Solicitar ahora

Detalles del empleo

Beneficios

Seguro dental

Cualificaciones

Informática
SoC
ARM
Debugging

Descripción completa del empleo

Are you looking for an innovative and consolidated place for your professional development? GMV is an experienced technology group and…

We are expanding our teams in the GNSS-User Segment Navigation unit to take on projects related to receivers technology.

We´ll get to the point; we'll tell you what's not on the web. If you want to know more about us go to GMV website.

WHAT CHALLENGE WILL YOU BE TAKING ON?

As part of the GMV Receivers team, you will have a key role in projects related to receiver technology, contributing to the development of projects and products with strong involvement in R&D activities.

You will participate in migrating an arquitecture currently implemented on Xilinx MPSoC / FPGA to an ASIC solution. Additionally, you will have the opportunity to work on the analysis of the existing design, identification of reusable blocks, adaptation of the hardware architecture, and definition of the ASIC implementation flow.

Your main tasks would be:

Define and evolve the target architecture for ASIC.
Develop and adapt RTL blocks (VHDL/Verilog/SystemVerilog).
Analyze and optimize internal interfaces (buses, memories, synchronization, clocks, and resets)
Participate in functional verification, simulation, and design debugging.
Contribute to the ASIC flow: synthesis, timing analysis, CDC/RDC, DFT, and design closure.Document architecture, technical decisions, and validation results.

WHAT DO WE NEED IN OUR TEAM?

For this role, we are looking for graduates in Electronic Engineering, Telecommunications, Computer Science, or similar, with a specialization in the field of digital hardware programming.

Additionally, we are seeking profiles with knowledge of digital RTL design, FPGA , SoC or MPSoC architectures, internal buses, IP integration, and functional verification; as well as previous experience in ASIC flow and handling simulation and synthesis tools.

We will also value previous knowledge of STA, DFT, scan, low-power, UPF, floorplanning or backend; verification with SystemVerilog, UVM, assertions or cocotb; embedded ARM/RISC-V processors and hardware/software partitioning; and experience with Synopsys, Cadence, Siemens EDA, Vivado, or Vitis tools.

WHAT DO WE OFFER?

Hybrid working model and 8 weeks per year of teleworking outside your usual geographical area.

Flexible start and finish times, and intensive working hours Fridays and in summer.

Personalized career plan development, training and language learning support.

National and international mobility. Do you come from another country? We can offer you a relocation package.

Competitive compensation with ongoing reviews, flexible compensation and discount on brands.

Wellbeing program: Health, dental and accident insurance; free fruit and coffee, physical, mental and financialhealth training, and much more!

️ In our recruitment processes you will always have telephone and personal contact, face-to-face or online, with our talent acquisition team. In addition, bank transfers and bank cards will never be requested. If you are contacted through any other process, please write to our team at [email protected]

❤️We promote equal opportunities in recruitment, and we are committed to inclusion and diversity.

WHAT ARE YOU WAITING FOR? JOIN US

#LI-Hybrid

If you have any questions please do not hesitate to contact Carolina Barber Caso, in charge of this vacancy.

Carolina Barber Caso

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design verification engineer empleos en comunidad de madrid

ASIC Design Engineer

Electronics design engineer (Space systems)

Senior Hardware Design Engineer (SOC - FPGA and Firmware)

Senior ATC ERTMS On Board Design Engineer

Electrical & Lighting System Design Office Engineer (+Simulation Skills)

Communication System Designer Engineer for COMBAT A/C

Systems engineer (Defence sector)

IT Infrastructure Engineer

RF & Signal Processing Engineer (Space systems)

Design & Development Lab Test Means

CBTC Software Verification Engineer

Digital Signal Processing & FPGA Engineer Radar

PCB Engineer for electronics equipment

RMT Engineer for A400M Program

Mission Systems Engineer

Digital Signal Processing & FPGA Engineer Radar

Internship - Mechanical/Structural Engineer

Senior Mixed-signal IC Design Engineer

Flight on-board SW engineer

Systems Verification and Validation Engineer (Cybersecurity)

Quiero recibir la alerta de empleo más reciente de design verification engineer en comunidad de madrid

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